1. Field of the Invention
The invention generally relates to compound semiconductors. In particular, the invention relates to the protection of circuits from undesired transient voltage spikes such as those from electrostatic discharge (ESD).
2. Description of the Related Art
An undesired voltage transient on a data line can damage an electronic circuit. As technology progresses and device geometries continue to shrink, devices become ever more sensitive to voltage transients. One example of a source of an undesired voltage transient is electrostatic discharge (ESD).
Steering diodes and transient voltage suppressors have been applied to data lines in conventional circuits implemented in silicon. Where such steering diodes and/or transient voltage suppressors are fabricated from silicon on a monolithic chip, pnpn or npnp thyristor latchup can occur, which can also damage the electronic circuit. Although incorporating discrete diodes and transient voltage suppressors on a monolithic chip is possible, such incorporation techniques can involve relatively expensive double-sided processing techniques and alignment methods, which are complex, expensive, and not standard tools in the processing of silicon. Silicon has other disadvantages, such as relatively low speed and relatively low isolation between devices. The relatively low isolation between devices gives rise to relatively high leakage currents and can rapidly drain the batteries of battery-powered circuits.
Faster devices, such as heterojunction bipolar transistors (HBTs) and monolithic microwave integrated circuits (MMICs), using Group III-V compound semiconductors such as gallium arsenide (GaAs), indium phosphide (InP), and the like, are preferred in certain relatively high-speed applications, such as in relatively high-speed digital circuits and in relatively high-frequency wireless circuits. Such circuits are also sensitive to undesired voltage transients. In conventional compound semiconductor circuits, a transient voltage protection circuit is fabricated from discrete components and coupled to a monolithic compound semiconductor circuit through bond wires and die attach. This results in a relatively low assembly yield and poor performance. For example, the bond wires can exhibit relatively significant inductance, which can decrease protection from relatively fast transients. In addition, relatively high parasitic capacitance from the wire-bonded discrete components renders such transient voltage protection circuits relatively ill suited to high-speed circuits such as microwave circuits.
What is needed is a transient voltage protection circuit that is monolithically integrated in a compound semiconductor circuit to protect the sensitive devices from undesired voltage transients.
The invention relates to the protection of devices in a monolithic chip fabricated from an epitaxial wafer, such as a wafer of a Group III-V compound semiconductor. A Group IV compound semiconductor can also be used. Devices fabricated from Group III-V compound semiconductors offer higher speed and better isolation than comparable devices from silicon semiconductors. Semiconductor devices can be permanently damaged when exposed to an undesired voltage transient such as electrostatic discharge (ESD). However, conventional techniques developed for silicon devices are not compatible with processing techniques for devices that are fabricated from epitaxial wafers, such as gallium arsenide (GaAs), which is a Group III-V compound semiconductor. Embodiments of the invention advantageously include transient voltage protection circuits that are relatively efficiently and reliably manufactured to protect sensitive devices from undesired voltage transients. Embodiments of the invention include circuits that are monolithically integrated with the circuit to be protected and also include circuits that are fabricated and packaged in a separate integrated circuit and are coupled via a printed wiring board (PWB) or printed circuit board (PCB) and placed in front of the circuit to be protected in the data path.
One embodiment according to the invention includes a protection circuit that protects devices coupled to a signal or data line from undesired transients on the signal line. The protection circuit is fabricated as a separate circuit and coupled to a circuit to be protected or can be monolithically integrated with the circuit to be protected. For example, the protection circuit can be part of a separate integrated circuit (IC) and attached to a PWB for coupling to the circuit to be protected. In one embodiment, the protection circuit is relatively near to an input/output (I/O) port, and the circuit to be protected is coupled to the I/O port through traces in the PWB that are coupled to the protection circuit. Advantageously, the protection circuit can be formed on the same side of a monolithic epitaxial substrate as the devices that are protected by the protection circuit. The monolithic epitaxial substrate can correspond to a Group III-V compound semiconductor or a Group IV compound semiconductor. For example, the Group III-V compound semiconductor can correspond to gallium arsenide (GaAs) substrates and indium phosphide (InP) substrates. Other examples of epitaxial wafers from which the protection circuit can be formed include indium gallium phosphide (InGaP), gallium nitride (GaN), aluminum gallium arsenide (AlGaAs), indium gallium arsenide (InGaAs), indium gallium aluminum phosphide (InGaAIP), indium gallium arsenide phosphide (InGaAsP), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), and others currently in existence or later developed. Examples of Group IV compound semiconductors include silicon carbide (SiC) and silicon germanium (SiGe), which can be based on a semi-insulating SiC substrate.
The protection circuit includes a first steering diode collection and a second steering diode collection. Embodiments of the protection circuit can optionally include a breakdown diode. The first steering diode collection and the second steering diode collection can include a single diode or can include an arrangement of diodes connected in series. The arrangement of multiple diodes in a stack can increase the forward voltage drop of the arrangement and thereby can advantageously be used to protection circuit without a breakdown diode. However, a breakdown diode can also be included in the protection circuit. A diode in the first steering diode collection or the second steering diode collection is fabricated from a base-collector junction of a transistor configured as a diode. In one embodiment, the portion of the transistor configured as a diode that would correspond to an emitter is removed by, for example, an etching process.
An anode of the first steering diode collection is electrically coupled to the signal line, and a cathode of the first steering diode collection is electrically coupled to a first reference. The first reference can include power supply sources and ground. A cathode of the second steering diode collection is electrically coupled to the signal line, and an anode of the second steering diode collection is electrically coupled to a second reference. The second reference can include negative power supply sources and ground. In one embodiment, the first steering diode collection is electrically coupled to the second steering diode collection through a metallization layer.
One embodiment of the protection circuit further includes a breakdown diode or transient voltage suppression (TVS) diode formed from a base-emitter junction of a transistor configured as the breakdown diode. Advantageously, the TVS diode can provide protection from undesired transients on a corresponding power supply line, such as VCC. The TVS diode A cathode of the breakdown diode is electrically coupled to the cathode of the first steering diode collection, and an anode of the breakdown diode is electrically coupled to the anode of the second steering diode collection. Advantageously, the breakdown diode is formed on the same side of the monolithic semi-insulating gallium arsenide (GaAs) substrate as the steering diodes and the devices to be protected.
In one embodiment, a plurality of first steering diode collections and a plurality of second steering diode collections, which are electrically coupled to and protect multiple signal lines, are electrically coupled to a single breakdown diode, thereby saving space and cost.
One embodiment according to the invention includes a method of producing a monolithic integrated chip with built-in transient voltage suppression. The method provides a substrate assembly made from an epitaxially-grown wafer, such as a Group III-V compound semiconductor, and includes a semi-insulating substrate, an N+ sub-collector layer, an N-type collector layer, a P-type base layer, and an N-type emitter layer. Selected portions of the N-type emitter layer are removed to isolate transistors and steering diodes. Optionally, selected portions of the N-type emitter layer are removed to isolate breakdown diodes. Remaining portions of the N-type emitter layer can be used to fabricate emitters for transistors. Where breakdown diodes are also fabricated, selected portions of the N-type emitter layer are also used as cathodes for breakdown diodes. Selected portions of the P-type base layer are also removed to isolate transistors and steering diodes. Optionally, selected portions of the P-type base layer are also removed to isolate breakdown diodes. Remaining portions of the P-type base layer can be used to fabricate bases for transistors and anodes for steering diodes. Where breakdown diodes are fabricated, selected portions of the P-type base layer are also used as anodes for breakdown diodes. Selected portions of the N-type collector layer are removed to isolate transistors and steering diodes. Remaining portions of the N-type collector layer can be used to fabricate collectors for transistors and cathodes for steering diodes. Where breakdown diodes are also fabricated, the process selectively removes portions of the N-type collector layer to isolate breakdown diodes.
Regions of the N+ sub-collector layer are isolated, by ion-implantation techniques and the like, to isolate transistors and steering diodes. An insulating layer is formed on the selected portions of the substrate assembly to provide electrical insulation and to prevent contamination of underlying layers. Electrical connections such as contacts and metallization are formed to electrically couple the transistors and the steering diodes as applicable. In one embodiment, the method further includes the removal of substantially all of the N-type emitter layer above a portion of a base layer that is used to form an anode of a steering diode.
One embodiment according to the invention includes a method of producing a monolithic integrated chip with built-in transient voltage suppression. The method provides a substrate assembly made from an epitaxially-grown wafer, such as a gallium arsenide (GaAs) Group III-V compound semiconductor, and includes a semi-insulating substrate, an N+ sub-collector layer, an N-type collector layer, a P-type base layer, and an N-type emitter layer.
The method forms a transistor by removing a first portion of the N-type emitter layer, a first portion of the P-type base layer, and a first portion of the N-type collector layer from around a second portion of the N-type emitter layer, by removing a second portion of the P-type base layer, and by removing a second portion of the N-type collector layer. A first portion or island of the N+ sub-collector layer is isolated by ion implantation, etching techniques, and the like.
The method forms a steering diode by removing a third portion of the N-type emitter layer including substantially all of a portion of the N-type emitter layer above a third portion and a fourth portion of the P-type base layer. The third portion of the P-type base layer and a third portion of the N-type collector layer are removed from around the fourth portion of the P-type base layer and a fourth portion of the N-type collector layer. The fourth portion of the P-type base layer and the fourth portion of the N-type collector layer are used as an anode and a cathode, respectively, of the steering diode. At least two steering diodes on the substrate assembly are electrically coupled to a transistor to protect the transistor on the substrate assembly from an undesired voltage transient.
In one embodiment, the method further forms a breakdown diode by using a base of the transistor as an anode of the breakdown diode and by using an emitter of the transistor as a cathode of the breakdown diode. In another embodiment, the method forms a breakdown diode by using a base of the transistor as an anode of the breakdown diode and by using a collector of the transistor as a cathode of the breakdown diode.
Another embodiment includes a method of producing a monolithic integrated chip with transient voltage suppression from a monolithic epitaxial semiconductor substrate with a semi-insulating substrate, a P+ sub-collector layer, a P-type collector layer, an N-type base layer, and a P-type emitter layer.
Another embodiment according to the invention includes a method of using pre-grown layers in a monolithic substrate assembly made from a Group III-V compound semiconductor such as gallium arsenide (GaAs) to form a transient voltage protection circuit. The method includes fabricating collector regions for transistors and cathode regions for steering diodes from an N-type collector layer. Base regions for transistors and anode regions for steering diodes are fabricated from a P-type base layer. Emitter regions for transistor and cathode regions for breakdown diodes are fabricated from an N-type emitter layer.
An anode of a first steering diode is electrically coupled to a data line that is also electrically coupled to a transistor. A cathode of the first steering diode is electrically coupled to a first reference to protect the transistor from an undesired positive-going voltage transient. A cathode of a second steering diode is electrically coupled to the anode of the first steering diode and to the data line. An anode of the second steering diode is electrically coupled to a second reference to protect the transistor from an undesired negative-going voltage transient. One embodiment of the method further fabricates a cathode and an anode of a breakdown diode from the N-type emitter layer and the P-type base layer, respectively. The breakdown diode is electrically coupled to steering diodes to protect against voltage transients on reference lines such as power and ground.
One embodiment includes a method of protecting a device on a monolithic gallium arsenide (GaAs) chip from undesired voltage transients on a signal line. The method includes clamping the signal line to a first positive voltage when the chip is in a powered-on state in response to an undesired voltage transient with a positive-going spike, where the first positive voltage is a multiple of a forward voltage drop of a monolithically integrated diode above a power supply voltage that is supplied to the monolithic chip. The method further includes clamping the signal line to a second positive voltage when the monolithic chip is in a powered-off state, where the second positive voltage is a sum of the first multiple of the forward voltage drop of the monolithically integrated diode and a reverse breakdown voltage of a breakdown diode that is also integrated into the monolithic chip. The method further includes clamping the signal line to a negative voltage that is a multiple of a forward voltage drop of a monolithically integrated diode below a ground potential in response to an undesired voltage transient with a negative-going spike. In addition, one embodiment further includes protecting multiple signal lines through multiples steering diodes that are coupled to a common breakdown diode on the monolithic chip.